Some memory systems, such as solid-state drives (SSDs), contain one or more memory dies having blocks of memory that can be read or written in parallel. However, there is often a single channel or bus between the plurality of memory dies and a controller. So, for example, if data is being transferred over the bus from the controller to one of the memory dies for a write operation, the bus may be busy for a relatively-long time, preventing new commands from being issued to the other memory dies. However, some memory systems give priority to read commands and have read response latency requirements, requiring a read command be serviced in a certain period of time (e.g., 50 microseconds). In such systems, a write operation to one die (die 0) can be interrupted if a read command is sent to another die (die 1). After the read command is sent, the controller would resend the write command to the die 0, and the data transfer would start from the beginning, resulting in re-sending previously-sent data.